1. Journals
  2. Conferences
  3. Patents

Selected Conference Publications

 Gyuseong Kang, Yunho Jang, and Jongsun Park, "Spin Orbit Torque Device based Stochastic Multi-bit Synapses for On-chip STDP learning", International Symposium of Low Power Electronics and Applications (ISLPED), July 2018.

Daehan Ji, Bohun Kim, and Jongsun Park, "An Energy-efficient Convolutional Neural Network Using Zero Computation Reduction", 2018 SoC 학술대회, May 2018.

 Heetak Kim and Jongsun Park, "Designing Energy Efficient High Accuracy Spiking Neural Network using Approximate Computing", 2018 SoC 학술대회, May 2018.

 Woong Choi, Hoonki Kim, Changnam Park, Taejoong Song and Jongsun Park, "Half-and-Half Compare Content Addressable Memory with Charge-Sharing based Selective Match-Line Precharge Scheme", IEEE Symposium on VLSI Circuits (VLSIC), June 2018.

■ Hoyoung Tang, Heetak Kim, Donghyeon cho and Jongsun Park, "Spike Counts Based Low Complexity Learning with Binary Synapse", International Joint Conference on Neural Networks (IJCNN), July 2018.

■ Woong Choi, Kwanghyo Jeong, Kyungrak Choi, Kyeongho Lee and Jongsun Park, "Content Addressable Memory Based Binarized Neural Network Accelerator Using Time-Domain Signal Processing", Design Automation Conference (DAC), Jun. 2018.

■ Woong Choi, Kyeongho Lee and Jongsun Park, "Low Cost Ternary Content Addressable Memory Using Adaptive Matchline Discharging Scheme", IEEE International Symposium on Circuits and Systems (ISCAS), May 2018.

■ Gyuseong Kang, Yunho Jang and Jongsun Park, "Charge-Recycling based Redundant Write Prevention Technique for Low Power SOT-MRAM", IEEE International Symposium on Circuits and Systems (ISCAS), May 2018.

■ Nahsung Kim, Dongyeob Shin, Wonseok Choi, Bohun Kim, and Jongsun Park, "An Energy-efficient and Low area CNN Accelerator based on Combined Weight Type Quantization", 한국반도체학술대회, Feb. 2018.

■ Donghyeon Cho, Gyuseong Kang, Heetak Kim, Yunho Jang, and Jongsun Park, "Energy efficient Spike-Timing Dependent Plasticity Rule for Unsupervised Learning", 한국반도체학술대회, Feb. 2018.

■ Kwanghyo Jeong, Kyeongho Lee, Woong Choi, and Jongsun Park, "Low Power Contents Addressable Memory with NMOS Gated Selective Precharge Matchline", 한국반도체학술대회, Feb. 2018.

■ Wonseok Choi and Jongsun Park, "An Efficient Convolutional Neural Networks Design with Heterogeneous SRAM Cell Sizing", IEEE ISOCC, Nov. 2017.

■ Kyungrak Choi, Woong Choi, Kyungho Shin, and Jongsun Park, "Bit-width Reduction and Customized Register for Low Cost Convolutional Neural Network Accelerator", International Symposium on Low Power Electronics (ISLPED), July 2017.

■ Qianying Tang, Chen Zhou, Woong Choi, Gyuseong Kang, Jongsun Park, Keshab Parhi, and Chris H. Kim,  "A DRAM based Physical Unclonable Function Capable of Generating > 1032 Challenge Response Pair per 1Kbit Array for Secure Chip Authentication", Custom Integrated Circuits Conference (CICC), Apr. 2017. 

■ Cheolhwan Kim, Gyuseong Kang and Jongsun Park, "Approximate Computation Sharing Multiplier for Low Power Convolutional Neural Networks Design", 한국반도체학술대회, Feb. 2017.

■ Sangkyu Lee, Hoyoung Tang, Kyungrak Choi, and Jongsun Park, "Customized SRAM design for Low Power Video codec applications", IEEE ISOCC, Oct. 2016.

■ Gihoon Jung, Kyungrak Choi, and Jongsun Park, "A Compact Multi-Mode CORDIC with Global-Shifting-Sum (GSS) Method", IEEE Asia Pacific Conference on Circuits & Systems (APCCAS), Oct. 2016.

■ Jinil Chung, Jongsun Park, and Swaroop Ghosh, "Domain Wall Memory based Convolutional Neural Networks for Bit-width Extendability and Energy-Efficiency", International Symposium on Low Power Electronics (ISLPED), Aug. 2016.

■ Kyungrak Choi, Jinil Chung, Hoyoung Tang, Woong Choi, and Jongsun Park, "Low Power Embedded SRAM for Pipelined Bitonic Sorter", 2016 대한전자공학회 하계종합학술대회, Jun. 2016. 

■ Cheolhwan Kim, Byeongil Park, Gyuseong Kang, and Jongsun Park, "Retention-aware Reconfigurable eDRAM-based LIFO Memory Design for DSP System", 2016 대한전자공학회 하계종합학술대회, Jun. 2016.

■ Kyungrak Choi, Hoyoung Tang, Woong Choi, and Jongsun Park, "Low Power SRAM for FFT Processor with preventing unnecessary Pseudo-Read and Wordline activation", 2016 SoC 학술대회, May. 2016. 

■ Byeonggil Park, Gyuseong Kang, and Jongsun Park, "Retention-Time Aware Reconfigurable eDRAM-based FIFO Memory for Refresh-Free DSP Design", 한국반도체학술대회, Feb. 2016.

■ Dongyeob Shin, Ji-Hwan Yoon, Gihoon Jung, and Jongsun Park, "A Low Complexity Massive MIMO Detection Architecture based on Richardson Iterative Method", 한국반도체학술대회, Feb. 2016.

■ Woong Choi, Kyungho Shin, and Jongsun Park, "Unnecessary Pseudo-Read Prevent SRAM for Low-Power Viterbi Decoder", 한국반도체학술대회, Feb. 2016.

■ Kyungho Shin and Jongsun Park, "A Single-Ended 6T1D SRAM Cell With Feedback-fade Write Access for Near-threshold Operation", 2015 추계학술대회.

■ Seungyong An, Hoyoung Tang, and Jongsun Park, "A Inversion-Less Peterson algorithm based shared KES architecture for Concatenated BCH decoder", IEEE ISOCC, Nov. 2015.

■ Byunggi Kang and Jongsun Park, "Low Complexity Massive MIMO Detection Architecture based on Neumann Method", IEEE ISOCC, Nov. 2015.

■ Jinil Chung, Kenneth Ramclam, Swaroop Ghosh, and Jongsun Park, “Domain Wall Memory based Digital Signal Processors for Area and Energy-Efficiency”, Design Automation Conference (DAC), June 2015. 

■ Jae-Won Jang, Jongsun Park, Swaroop Ghosh, and Swarup Bhunia, “Self-Correcting STTRAM under Magnetic Field Attacks”, Design Automation Conference (DAC), June 2015.  

■ Hoyoung Tang, Gihoon Jung, and Jongsun Park "A Hybrid Multimode BCH Encoder Architecture for Area Efficient Re-Encoding Approach", IEEE ISCAS, May. 2015. 

■ Gihoon Jung and Jongsun Park " An Area Efficient Scaling-Free CORDIC Algorithm Using Global Shifting Sum(GSS) Method", 한국반도체학술대회, Feb. 2015. 

■ Hoyoung Tang and Jongsun Park "A MP-based BCH Encoder for Reducing the Latency of SC based on re-Encoding Architecture", 한국반도체학술대회, Feb. 2015. 

■ Gyuseong Kang and Jongsun Park " Low Power Signal Processing Unit for Pulse Oximetry", 한국반도체학술대회, Feb. 2015. 

■ Woong Choi, Jongsun Park, and Gyuseong Kang "Dynamic Stability Estimation for Latch-Type Voltage Sense Amplifier", IEEE ISOCC, Nov. 2014. 

■ Dongyeob Shin, Ji-Hwan Yoon, Jongsun Park, and Woong Choi "Gram-Schmidt tailed High-throughput QR Decomposition Architecture for MIMO detector", IEEE ISOCC, Nov. 2014. 

■ Ji-Hwan Yoon, Dongyeob Shin, and Jongsun Park, "A Low-Complexity Composite QR Decomposition Architecture for MIMO Detector", IEEE ISCAS, June 2014. 

■ Jinil Chung and Jongsun Park, "Unified Single-port Survivor Memory for High-speed Viterbi Decoder using 3-unit Packing/Unpacking-based Data Processing", 한국반도체학술대회, Feb. 2014. 

■ Juseong Lee and Jongsun Park, "Hardware Optimization for Low Complexity Edge Detection", 한국반도체학술대회, Feb. 2014. 

■ Abhishek Basak, Yu Zheng, Jangwon Park, Jongsun Park, and Swarup Bhunia, "Reconfigurable ECC for Adaptive Protection of Memory", IEEE MWSCAS, August 2013. 

■ 송동후이주성신동엽박종선, "Heterogeneous Precharge Level 이용한저전력 H.264 임베디드 SRAM 설계", 2013 대한전자공학회 하계종합학술대회. 

■ Iput Heri Kurniawan, Ji-Hwan Yoon, and Jongsun Park, "Multidimensional Householder based High-Speed QR Decomposition Architecture For MIMO Receivers", IEEE ISCAS, May 2013. 

■ 당호영송동후신동엽박종선, "Write 동작의 에너지 감소를 통한 Viterbi decoder전용 저전력 임베디드 SRAM 설계", 2013 SoC 학술대회. 

■ Samir Debnath, Woong Choi, and Jongsun Park, "A Single-Ended 6T SRAM Cell with Read-Upset-Preventor", 2012 추계학술대회

■ Dongwan Kim, Wan-Seon Lim, and Jongsun Park, "Dual Queue based Rate Selecting Schedule for Throughput Enhancement in WLANs", IEEE ISCAS, pp. 540-543, May 2012. 

■ Min-Woo Lee, Ji-Hwan Yoon, and Jongsun Park, "High-Speed Tournament Givens Rotation-based QR Decomposition Architecture for MIMO reciever", IEEE ISCAS, pp. 21-24, May 2012. 

■ 이민우박종선, “Low Power CORDIC Architecture Using Trigonometric Characteristics”, pp.365-366, 2012 반도체 학술대회. 

■ 박장원권진모김동완박종선, “저전력 H.264 프로세서를 위한 가변적인 비트 폭임베디드 메모리 설계”, pp. 302-303, 2012 반도체 학술대회

■ 윤지환박종선, “알고리즘적인 재공식화를 통한 저전력 LDPC 복호기의 설계”, 2011 추계학술대회

■ Woojin Rim, Jinmo Kwon, and Jongsun Park, "Variation-aware low-power video processor design techniques", IEEE MWSCAS, 2011. 

■ Ji-Woong Choi, Jungwon Lee, Hui-Ling Lou, and Jongsun Park, "Improved MIMO SIC Detection Exploiting ML Criterion", IEEE VTC, Fall, 2011. 

■ 권진모박종선, “저전력 H.264 프로세서를 위한 이종 사이즈 임베디드 메모리설계”, 2011 SoC 학술대회. 

■ 이인수박종선, “저전력 H.264/AVC 어플리케이션을 위한 중요도 기반 에러 보정부호화 방안”, 2010 추계학술대회. 

■ 이석재이민우최지웅박종선, “An Energy-Efficient Reconfigurable DLMS Adaptive Filter Design”, 2010 SoC 학술대회. 

■ Seetharam Narasimhan, Jongsun Park, and Swarup Bhunia, “Digital Signal Processing in Bio-implantable Systems: Design Challenge and Emerging solutions”, ASQED, 2010. 

■ 이민우박종선, “High Performance CORDIC Architecture using Sign-Select Lookahead Approach”, 17 한국반도체학술대회, 2010. 

■ Jongsun Park, Jung Hwan Choi, and Kaushik Roy,"Dynamic Bit Width Adaptation in DCT : Image Quality versus Computation Energy Trade off", DATE, 2006. 

■ Yongtao Wang, Hamid Mahmoodi, Hunsoo Choo, Jongsun Park, Woopyo Jeong, Lihyih Chiou and Kaushik Roy, "Hardware Architecture and VLSI Implementation of a low-power high-performance polyphase channelizer with application to subband adaptive filtering", IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), Volume 5, pp 97-100, May, 2004.

■ Jongsun Park and Kaushik Roy,"A low power reconfigurable DCT architecture to trade off image quality for computational complexity", IEEE ICASSP, May 2004.

■ Jongsun Park, Khurram Muhammad and Kaushik Roy, "Efficient Generation of 1/fα Noise Using a Multi-rate Filter Bank", IEEE Custom Integrated Circuit Conference (CICC), pp 707-710, September, 2003.

■ Jongsun Park, Woopyo Jeong, Hunsoo Choo, Hamid Mahmoodi, Yongtao Wang, Kaushik Roy, "High performance and Low power FIR filter Design Based on Sharing Multiplication", IEEE International Symposium on Low Power Electronics Design (ISLPED), pp 295-300, August, 2002.

■ Soonkeon Kwon, Jongsun Park and Kaushik Roy, "DCT Processor Architecture Based on Computation Sharing", IEEE International Conference on Circuits and Systems for Communications, pp 162-165, June, 2002.

■ Jongsun Park, Soonkeon Kwon, Kaushik Roy "Low Power Reconfigurable DCT Design based on Sharing Multiplication", IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), Vol.3, pp.3116-3119, June, 2002.

■ Jongsun Park, Hunsoo Choo, Khurram Muhammad, Kaushik Roy "Non adaptive and Adaptive Filter implementation based on sharing multiplication", IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), Volume 1, pp 460-463, June 2000.

XE Login